The invention relates generally to the field of power over local area networks, particularly Ethernet based networks, and more particularly to a method of detection and determination of a type of powered device attached over four twisted wire pairs.
Power over Ethernet (PoE), in accordance with both IEEE 802.3af-2003 and IEEE 802.3at-2009, each published by the Institute of Electrical and Electronics Engineers, Inc., New York, the entire contents of each of which is incorporated herein by reference, defines delivery of power over a set of 2 twisted wire pairs without disturbing data communication. The aforementioned standards particularly provide for a power sourcing equipment (PSE) and a powered device (PD). The power sourcing equipment is configured to detect the PD by ascertaining a valid signature resistance, and to supply power over the 2 twisted wire pairs only after a valid signature resistance is actually detected.
U.S. Pat. No. 7,492,059 issued Feb. 17, 2009 to Peker et al, the entire contents of which is incorporated herein by reference is addressed to powering a PD over 4 twisted wire pairs. Such a technique provides for increased power as compared to either of the above mentioned standards, and is commercially available from Microsemi Corporation of Alisa Viejo, Calif.
The HD BaseT Alliance of Beaverton Oregon has published the HDBaseT Specification Version 1.1.0 which defines a high power standard utilizing twisted wire pair cabling, such as Category 5e (CAT 5e) or Category 6 (CAT 6) structured cabling as defined by ANSI/TIA/EIA-568-A. The specification provides for even higher power than the above mentioned IEEE 802.3at-2009 over each set of 2 pairs, with all 4 pairs utilized for powering, and allows for power over structured communication cabling from any of: a type 1 PSE, denoted hereinafter as a low power
PSE, typically meeting the above mentioned IEEE 802.3af standard; a type 2 PSE denoted hereinafter as a medium power PSE, typically meeting the above mentioned IEEE 802.3at standard; a type 3 PSE, denoted hereinafter as a high power PSE, typically meeting the above HDBaseT specification; twin medium power PSEs; and twin high power PSEs.
Detection, in accordance with any of the above standards requires the supply of at least 2 voltage levels between the range of 2.8 volts and 10 volts, with a signature resistance of the PD determined based on a calculation of the actual voltage levels, or current, detected. The use of 2 voltage levels allows for determination of the signature resistance irrespective of the existence of a diode bridge, typically supplied at the input to the PD.
Twin medium power PSEs or twin high power PSEs may be paired with any type of PD, i.e. a PD which is arranged to receive power over only 2 sets of twisted wire pairs, or a PD which is arranged to receive power over 4 sets of twisted wire pairs, without limitation, and thus the twin medium power PSEs or twin high power PSEs must be designed to properly detect the PD irrespective of its arrangement. In the event that a PD arranged to receive power over only 2 sets of twisted wire pairs is connected, simultaneous detection by each of the twin PSEs would interfere with proper detection, as described in further detail in U.S. Pat. No. 7,492,059, issued Feb. 17, 2009 to Peker et al, and U.S. Pat. No. 7,595,756 issued Sep. 22, 2009 to Ferentz, the entire contents of both of which are incorporated herein by reference. Similarly, a PD which is supplied without a diode bridge, or in the event that two separate PDs are supplied, one on each 2 sets of twisted wire pairs, can only be properly detected by performing detection on each of the 2 sets of twisted wire pairs.
FIG. 1A illustrates a high level schematic diagram of an alternative A
PoE powering arrangement 10, according to the prior art, comprising: a switch/hub 20; a plurality of twisted wire pairs 30 constituted within a structured cable 35; and a PD 40. Switch/hub 20 comprises a plurality of data transformers 50 and a PSE 60. PD 40 comprises: a plurality of data transformers 50; a first and a second diode bridge 65; a PD interface 70; an electronically controlled switch 80; and a PD load circuitry 90. PD interface 70 comprises: an under-voltage lockout (UVLO) circuit 100; a signature impedance 110; and a class current source 120. Optionally, a class event counter is further supplied (not shown). PSE 60 comprises a detection functionality 62, a classification functionality 64 and a powering functionality 66, each of which may be constituted in a dedicated circuitry, or as a programmed functionality for a computing element, without limitation. A data pair is connected across the primary of each data transformer 50 in switch/hub 20 and a first end of each twisted wire pair 30 is connected across the secondary of each data transformer 50 in switch/hub 20 via respective connections, listed conventionally in two groups: connections 1, 2, 3, 6; and connections 4, 5, 7 and 8. The outputs of PSE 60 are respectively connected to the center taps of the secondary windings of data transformers 50 of switch/hub 20 connected to twisted wire pairs 30 via connections 1, 2, 3 and 6. Structured cable 35 typically comprises 4 twisted wire pairs 30.
A data pair is connected across the primary of each data transformer 50 in PD 40 and a second end of each twisted wire pair 30 is connected across the secondary of each data transformer 50 in PD 40 via respective connections, listed conventionally in two groups: connections 1, 2, 3, 6; and connections 4, 5, 7 and 8. The inputs of first diode bridge 65 are respectively connected to the center taps of the secondary windings of data transformers 50 of PD 40 connected to twisted wire pairs 30 via connections 1, 2, 3 and 6. The inputs of second diode bridge 65 are respectively connected to the center taps of the secondary windings of data transformers 50 of PD 40 connected to twisted wire pairs 30 via connections 4, 5, 7 and 8. The positive outputs of first and second diode bridges 65 are commonly connected to the positive input of PD interface 70, and the returns of first and second diode bridges 65 are commonly connected to the return of PD interface 70. PD interface 70 is illustrated as having a pass through connection from the positive input to the positive output thereof, and power for each of UVLO circuit 100, signature impedance 110 and class current source 120 are provided there from (not shown). PD interface 70 is illustrated as having a pass through connection from the return input to the return output thereof, and a return for each of UVLO circuit 100, signature impedance 110 and class current source 120 are provided there from (not shown). Electronically controlled switch 80 is arranged to provide a switchable connection between the return of PD load circuitry 90 and the return of PD interface 70, and electronically controlled switch 80 is responsive to an output of UVLO circuit 100, indicative that received power is reliable and is denoted PG. The positive input of PD load circuitry 90 is connected to the positive output of PD interface 70.
Powering arrangement 10 has been illustrated in an embodiment wherein electronically controlled switch 80 is connected in the return path, however this is not meant to be limiting in any way, and is simply meant as a depiction of one embodiment of alternative A powering known to those skilled in the art. Similarly, PSE 60 is illustrated as being part of switch/hub 20 however this is not meant to be limiting in any way, and midspan equipment may be utilized to provide a connection for PSE 60 without exceeding the scope. PSE 60 may be any equipment arranged to provide power over communication cabling, including equipment meeting the definition of a PSE under any of IEEE 802.3af; IEEE 802.3at; and the above mentioned HDBaseT specification, without limitation.
In operation, electronically controlled switch 80 is initially set to isolate PD load circuitry 90 from PSE 60. PSE 60 detects PD 40 utilizing detection functionality 62 in cooperation with signature impedance 110 presented by PD interface 70. After detection, PSE 60 optionally presents a classification voltage to PD 40 utilizing classification functionality 64, and class current source 120 is arranged to drive a predetermined current indicative of the power requirements of PD load circuitry 90 responsive to the presented classification voltage, thus indicating to PSE 60 the power requirements thereof The amount of current is detected by classification functionality 64. Optionally, PSE 60 further provides PD 40 with information regarding the powering ability of PSE 60 by providing a plurality of classification events separated by mark events, with the information provided by the number of classification events. The mark events function to define the individual classification events. A class event counter, if supplied, is arranged to count the classification events and output information regarding the counted classification events to PD load circuitry 90, thus providing PD load circuitry 90 with information regarding the powering ability of PSE 60.
PSE 60 is further arranged, in the event that sufficient power is available to support the power requirements detected and output by classification functionality 64, to provide operating power for PD 40 over 2 twisted wire pairs 30 of structured cable 35 by raising the voltage above the classification voltage range responsive to powering functionality 66. First diode bridge 65 is arranged to ensure that power received by PD interface 70 and PD load circuitry 90 is at a predetermined polarity irrespective of the connection polarity of PSE 60. UVLO circuit 100 is arranged to maintain isolation between PSE 60 and PD load circuitry 90 until a predetermined operating voltage has been achieved across PD interface 70, and upon sensing the predetermined operating voltage UVLO circuit 100 is further arranged to assert output PG thus closing electronically controlled switch 80 thereby providing power to PD load circuitry 90. Optionally, a timer (not shown) may be provided to ensure that the startup phase is complete prior to closing electronically controlled switch 80.
FIG. 1B illustrates a high level schematic diagram of an alternative B PoE powering arrangement 200, according to the prior art, comprising: a switch/hub 20; a plurality of twisted wire pairs 30 constituted within a structured cable 35; and a PD 40. Alternative B PoE powering arrangement 200 is in all respects identical to alternative A PoE powering arrangement 10 with the exception that the outputs of PSE 60 are respectively connected to the center taps of the secondary windings of data transformers 50 of switch/hub 20 connected to twisted wire pairs 30 via connections 4, 5, 7 and 8. The operation of alternative B PoE powering arrangement 200 is in all respects identical to alternative A PoE powering arrangement 10, and in the interest of brevity will not be further detailed.
FIG. 1C illustrates a high level schematic diagram of a PoE powering arrangement 300 utilizing twin PSEs to provide power to a PD over 4 twisted wire pairs, in accordance with the prior art, comprising: a switch/hub 20; a plurality of twisted wire pairs 30 constituted within a structured cable 35; and a PD 40. PoE powering arrangement 300 is in all respects identical to alternative A PoE powering arrangement 10 and alternative B PoE powering arrangement 200 with the exception that a first and a second PSE 60 are supplied, the outputs of first PSE 60 respectively connected to the center taps of the secondary windings of data transformers 50 of switch/hub 20 connected to twisted wire pairs 30 via connections 1, 2, 3 and 6, representing a first powering path, and the output of second PSE 60 connected to the center taps of the secondary windings of data transformers 50 of switch/hub 20 connected to twisted wire pairs 30 via connections 4, 5, 7 and 8, representing a second powering path. A communication link is provided between the first PSE 60 and second PSE 60 to provide for the required coordination, as will be described further. For simplicity, the details of PSE 60 are omitted. The operation of PoE powering arrangement 300 is in all respects identical to alternative A PoE powering arrangement 10 and alternative B PoE powering arrangement 200 with the exception that power is supplied by each of first PSE 60 and second PSE 60.
FIG. 1D illustrates the voltage waveform outputs from first PSE 60, denoted waveform 350, and the voltage waveform output from second PSE 60, denoted waveform 360, both as experienced at PD interface 70, in accordance with PoE powering arrangement 300 and in accordance with the prior art, wherein the x-axis represents time and the y-axis represents voltage in arbitrary units. In order to avoid interference, first PSE 60 performs detection of signature impedance 110, and after completion of the detection, second PSE 60 performs detection of signature impedance 110, with the timing coordinated by the communication link between first PSE 60 and second PSE 60. After both first PSE 60 and second PSE 60 have performed detection, first PSE 60 performs classification in cooperation with class current source 120, and then second PSE 60 performs classification in cooperation with class current source 120. Finally, powering is performed, preferably simultaneously, responsive to the communication link, by each of first PSE 60 and second PSE 60.
In the event that PD 40, arranged to receive power over all 4 twisted wire pairs, is connected between the detection performed by first PSE 60 and detection performed by second PSE 60, as shown by dotted line 370, a problem occurs. Specifically, first PSE 60 will not provide power on its 2 twisted wire pairs, since detection has failed, whereas second PSE 60 will provide power on its 2 twisted wire pairs. PD 40, which is arranged to receive power over all 4 twisted wire pairs, will only receive power from second PSE 60, which may be insufficient for proper operation. Unless PD 40 completely shuts down, detection will not be performed again by first PSE 60, since power appears on the twisted wire pairs connected thereto as provided by second PSE 60. Such a condition is problematic as it leads to unexpected results.